IEEE - Institute of Electrical and Electronics Engineers, Inc. - Two-level pipelined systolic array graphics engine

Author(s): J.A.K.S. Jayasinghe ; F.M. El-Hadidy ; G. Karagiannis ; O.E. Herrmann ; J. Smit
Sponsor(s): IEEE Solid-State Circuits Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 March 1991
Volume: 26
Page Count: 8
Page(s): 229 - 236
ISSN (Paper): 0018-9200
ISSN (Online): 1558-173X
DOI: 10.1109/4.75000
Regular:

The authors report a VLSI design of an advanced systolic array graphics (SAG) engine built from pipelined functional units which can generate realistic images interactively for high-resolution... View More

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