IEEE - Institute of Electrical and Electronics Engineers, Inc. - Systolic array implementation of multipliers for finite fields GF(2/sup m/)

Author(s): Chin-Liang Wang ; Jung-Lung Lin
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 July 1991
Volume: 38
Page Count: 5
Page(s): 796 - 800
ISSN (Paper): 0098-4094
DOI: 10.1109/31.135751
Regular:

A parallel-in-parallel-out systolic array and a serial-in-serial-out systolic array are proposed for fast multiplication in finite fields GF(2/sup m/) with the standard basis... View More

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