IEEE - Institute of Electrical and Electronics Engineers, Inc. - Testbench Design for Mixed Signal SoC Based on Task Flow

2010 International Conference on Electrical and Control Engineering (ICECE)

Author(s): Ruan Xiaoli ; Li Zheying
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2010
Conference Location: Wuhan, China, China
Conference Date: 25 June 2010
Page(s): 4,354 - 4,357
ISBN (CD): 978-0-7695-4031-3
ISBN (Electronic): 978-1-4244-6881-2
ISBN (Paper): 978-1-4244-6880-5
DOI: 10.1109/iCECE.2010.1058
Regular:

To reduce the testing cost of IP cores in SoC systems, a novel design method of the testbench based on task flow is proposed in this paper, which tries to improve the test coverage, differing from... View More

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