IEEE - Institute of Electrical and Electronics Engineers, Inc. - Error Analysis of Integrated Resistor Attenuation Network

2010 International Conference on Electrical and Control Engineering (ICECE)

Author(s): Li Zheying ; Xiu Limei ; Liu Jia ; Lv Chaisia ; Li Shuo
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2010
Conference Location: Wuhan, China, China
Conference Date: 25 June 2010
Page(s): 3,714 - 3,717
ISBN (CD): 978-0-7695-4031-3
ISBN (Electronic): 978-1-4244-6881-2
ISBN (Paper): 978-1-4244-6880-5
DOI: 10.1109/iCECE.2010.906
Regular:

The model and synthesis method of integrated linear attenuation network (LAC) used in mixed signal SoC for digital instrument are addressed in this paper. The model and synthesis method of the LAC... View More

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