IEEE - Institute of Electrical and Electronics Engineers, Inc. - On the design of new low-power CMOS standard ternary logic gates

2010 15th CSI International Symposium on Computer Architecture and Digital Systems (CADS)

Author(s): Doostaregan, A. ; Moaiyeri, M.H. ; Navi, K. ; Hashemipour, O.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2010
Conference Location: Tehran, Iran, Iran
Conference Date: 23 September 2010
Page(s): 115 - 120
ISBN (CD): 978-1-4244-6268-1
ISBN (Electronic): 978-1-4244-6269-8
ISBN (Paper): 978-1-4244-6267-4
DOI: 10.1109/CADS.2010.5623544
Regular:

A novel low-power and high-performance Standard Ternary Inverter (STI) for CMOS technology is proposed in this paper. This inverter could be used as a fundamental block for designing other ternary... View More

Advertisement