IEEE - Institute of Electrical and Electronics Engineers, Inc. - An optimal architecture of BCH decoder

2010 4th International Conference on Application of Information and Communication Technologies (AICT)

Author(s): Ahmadi, N. ; Sirojuddiin, M.H. ; Nandaviri, A.D. ; Adiono, T.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2010
Conference Location: Tashkent, Uzbekistan, Uzbekistan
Conference Date: 12 October 2010
Page(s): 1 - 5
ISBN (CD): 978-1-4244-6904-8
ISBN (Paper): 978-1-4244-6903-1
DOI: 10.1109/ICAICT.2010.5612003
Regular:

An optimal architecture for decoding BCH code is presented in this paper. This design uses a new architecture for syndrome computation to avoid multiplication operation, a Modified Direct Solution... View More

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