IEEE - Institute of Electrical and Electronics Engineers, Inc. - Design of RapidIO logical core based on safety arbitration mechanisms

2010 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia)

Author(s): Wu Fengfeng ; Jia Song ; Yang Kai ; Zhao Xiongbo ; Wu Guirong
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2010
Conference Location: Shanghai, China, China
Conference Date: 22 September 2010
Page(s): 142 - 145
ISBN (Electronic): 978-1-4244-6737-2
ISBN (Paper): 978-1-4244-6735-8
ISBN (Online): 978-1-4244-6736-5
DOI: 10.1109/PRIMEASIA.2010.5604940
Regular:

RapidIO is an emerging high-performance and point-to-point packetized interconnection technology. In this paper, the design of the logical core based on safety arbitration mechanisms is described... View More

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