IEEE - Institute of Electrical and Electronics Engineers, Inc. - Scalability enhancement of FG NAND by FG shape modification

2010 IEEE International Memory Workshop (IMW)

Author(s): Ganguly, U. ; Yokota, Y. ; Jing Tang ; Shiyu Sun ; Rogers, M. ; Miao Jin ; Thadani, K. ; Hamana, H. ; Garlen Leung ; Chandrasekaran, B. ; Thirupapuliyur, S. ; Olsen, C. ; Nguyen, V. ; Srinivasan, S.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 May 2010
Conference Location: Seoul, Korea (South), Korea (South)
Conference Date: 16 May 2010
Page(s): 1 - 4
ISBN (Electronic): 978-1-4244-6721-1
ISBN (Paper): 978-1-4244-6719-8
ISBN (Online): 978-1-4244-7668-8
DOI: 10.1109/IMW.2010.5488389
Regular:

Floating Gate (FG) NAND scaling has been severely challenged by the reduction of gate coupling ratio (CR) and increase in FG interference (FGI) below 30nm node. Firstly, scalability of inverted... View More

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