IEEE - Institute of Electrical and Electronics Engineers, Inc. - A new PSO-based approach to study the nanoscale DG MOSFETs

2010 5th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)

Author(s): Bendib, T. ; Djeffal, F. ; Abdi, M.A.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 March 2010
Conference Location: Hammamet, Tunisia, Tunisia
Conference Date: 23 March 2010
Page(s): 1 - 5
ISBN (CD): 978-1-4244-6339-8
ISBN (Electronic): 978-1-4244-6340-4
ISBN (Paper): 978-1-4244-6338-1
DOI: 10.1109/DTIS.2010.5487571
Regular:

The Double Gate (DG) MOSFET has been proposed as potential alternative to the conventional bulk CMOS structure for extended CMOS scalability beyond 30 nm partly due to its immunity to short... View More

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