IEEE - Institute of Electrical and Electronics Engineers, Inc. - An environment for energy consumption analysis of cache memories in SoC platforms

2010 VI Southern Programmable Logic Conference (SPL)

Author(s): Cordeiro, F.R. ; Silva-Filho, A.G. ; Araujo, C.C. ; Gomes, M. ; Barros, E.N.S. ; Lima, M.E.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 March 2010
Conference Location: Ipojuca, Pernambuco, Brazil, Brazil
Conference Date: 24 March 2010
Page(s): 35 - 40
ISBN (CD): 978-1-4244-6310-7
ISBN (Electronic): 978-1-4244-6311-4
ISBN (Paper): 978-1-4244-6309-1
DOI: 10.1109/SPL.2010.5483007
Regular:

The tuning of cache architectures in platforms for embedded systems applications can dramatically reduce energy consumption. The existing cache exploration environments constrain the designer to... View More

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