IEEE - Institute of Electrical and Electronics Engineers, Inc. - Improving topological mapping on NoCs

2010 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW 2010)

Author(s): Rafael Tornero ; Juan M Orduna
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 April 2010
Conference Location: Atlanta, GA, USA
Conference Date: 19 April 2010
Page(s): 1 - 4
ISBN (CD): 978-1-4244-6532-3
ISBN (Electronic): 978-1-4244-6534-7
ISBN (Paper): 978-1-4244-6533-0
DOI: 10.1109/IPDPSW.2010.5470811
Regular:

Networks-on-Chip (NoCs) have been proposed as an efficient solution to the complex communications on System-on-chip (SoCs). The design flow of network-on-chip (NoCs) include several key issues,... View More

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