IEEE - Institute of Electrical and Electronics Engineers, Inc. - An 8Tb/s 1pJ/b 0.8mm2/Tb/s QDR inductive-coupling interface between 65nm CMOS GPU and 0.1μm DRAM

2010 IEEE International Solid-State Circuits Conference (ISSCC)

Author(s): N. Miura ; K. Kasuga ; M. Saito ; T. Kuroda
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 February 2010
Conference Location: San Francisco, CA, USA
Conference Date: 7 February 2010
Page(s): 436 - 437
ISBN (CD): 978-1-4244-6035-9
ISBN (Electronic): 978-1-4244-6036-6
ISBN (Paper): 978-1-4244-6033-5
ISSN (CD): 0193-6530
ISSN (Electronic): 2376-8606
ISSN (Paper): 0193-6530
DOI: 10.1109/ISSCC.2010.5433909
Regular:

An 8 Tb/s 1 pJ/b 0.8 mm2/Tb/s inductive-coupling interface between 65 nm CMOS GPU and 0.1 -+m DRAM is developed. BER <10-16 operation is examined in 1024-bit parallel... View More

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