IEEE - Institute of Electrical and Electronics Engineers, Inc. - Improvement of damping impedance method for Power Hardware in the Loop simulations

2016 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC)

Author(s): Amaury Aguirre ; Monserrat Davila ; Pavel Zuniga ; Felipe Uribe ; Emilio Barocio
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2016
Conference Location: Ixtapa, Mexico
Conference Date: 9 November 2016
Page(s): 1 - 6
ISBN (Electronic): 978-1-5090-3794-0
DOI: 10.1109/ROPEC.2016.7830615
Regular:

The aim of this study is to present an improvement of the Damping Impedance Method (DIM) Interface Algorithm for Power Hardware in the Loop (PHIL) simulations. The improvement is based on the... View More

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