IEEE - Institute of Electrical and Electronics Engineers, Inc. - An approach to modeling clock tree of a complex system-on-chip

2016 24th Telecommunications Forum (TELFOR)

Author(s): Mirela Simonovic ; Vojin Zivojnovic ; Lazar Saranovac
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2016
Conference Location: Belgrade, Serbia
Conference Date: 22 November 2016
Page(s): 1 - 4
ISBN (CD): 978-1-5090-4085-8
ISBN (Electronic): 978-1-5090-4086-5
DOI: 10.1109/TELFOR.2016.7818891
Regular:

Clock tree of a complex system-on-chip is modeled across different design stages independently, resulting in multiplication of time and effort needed to develop clock tree models. Model-based... View More

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