IEEE - Institute of Electrical and Electronics Engineers, Inc. - Parallel decoding for multi-stage BCH decoder

2016 International SoC Design Conference (ISOCC)

Author(s): Prashanthi Metku ; Ramu Seva ; Kyung Ki Kim ; Yong-Bin Kim ; Minsu Choi
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2016
Conference Location: Jeju, South Korea
Conference Date: 23 October 2016
Page(s): 107 - 108
ISBN (Electronic): 978-1-5090-3219-8
ISBN (USB): 978-1-5090-3218-1
DOI: 10.1109/ISOCC.2016.7799756
Regular:

3D heterogeneous processor (commonly termed as 3DHP) integrating multiple processor (such as CPU/GPU) and DRAM dies vertically interconnected by a massive number of Through-Silicon Vias (TSVs) is... View More

Advertisement