IEEE - Institute of Electrical and Electronics Engineers, Inc. - High-speed low-area-cost VLSI design of polar codes encoder architecture using radix-k processing engines

2016 IEEE 5th Global Conference on Consumer Electronics

Author(s): Xin-Yu Shih ; Po-Chun Huang ; Yu-Chun Chen
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2016
Conference Location: Kyoto, Japan
Conference Date: 11 October 2016
Page(s): 1 - 2
ISBN (Electronic): 978-1-5090-2333-2
DOI: 10.1109/GCCE.2016.7800526
Regular:

Polar Codes applied for next-generation MIMO systems is an emerging research topic. In this work, we propose an efficient VLSI hardware architecture of the Polar encoder using radix-k processing... View More

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