IEEE - Institute of Electrical and Electronics Engineers, Inc. - Optimal compilation for exposed datapath architectures with buffered processing units by SAT solvers

2016 ACM/IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)

Author(s): Anoop Bhagyanath ; Klaus Schneider
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2016
Conference Location: Kanpur, India
Conference Date: 18 November 2016
Page(s): 143 - 152
ISBN (Electronic): 978-1-5090-2791-0
ISBN (USB): 978-1-5090-2790-3
DOI: 10.1109/MEMCOD.2016.7797759
Regular:

Conventional processor architectures are restricted in exploiting instruction level parallelism (ILP) due to the limited number of available registers in their instruction sets. Therefore, recent... View More

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