IEEE - Institute of Electrical and Electronics Engineers, Inc. - Clocks vs. instants relations: Verifying CCSL time constraints in UML/MARTE models

2016 ACM/IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)

Author(s): Judith Peters ; Nils Przigoda ; Robert Wille ; Rolf Drechsler
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2016
Conference Location: Kanpur, India
Conference Date: 18 November 2016
Page(s): 78 - 84
ISBN (Electronic): 978-1-5090-2791-0
ISBN (USB): 978-1-5090-2790-3
DOI: 10.1109/MEMCOD.2016.7797750
Regular:

The specification of non-functional requirements, e. g., on timing forms an essential part of modern system design. Modeling languages such as MARTE/CCSL provide dedicated description means... View More

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