IEEE - Institute of Electrical and Electronics Engineers, Inc. - Hardware-efficient and high-speed integer motion estimation architecture for HEVC

2016 IEEE International Conference on Consumer Electronics - Asia (ICCE-Asia)

Author(s): Vu Nam Dinh ; Hoang Anh Phuong ; Vo Le Cuong ; Nguyen Vu Thang
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2016
Conference Location: Seoul, South Korea
Conference Date: 26 October 2016
Page(s): 1 - 6
ISBN (Electronic): 978-1-5090-2743-9
DOI: 10.1109/ICCE-Asia.2016.7804799
Regular:

The hardware saving and high speed Integer Motion Estimation (IME) architecture for High Efficiency Video Coding (HEVC) is presented in this paper. This architecture can operate at max frequency... View More

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