IEEE - Institute of Electrical and Electronics Engineers, Inc. - A RAM based CMOS histogrammer integrated circuit

Author(s): F. Slorach ; J.R. Alsford
Sponsor(s): IEEE Nuclear and Plasma Sciences Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 February 1988
Volume: 35
Page Count: 4
Page(s): 209 - 212
ISSN (Paper): 0018-9499
ISSN (Online): 1558-1578
DOI: 10.1109/23.12709
Regular:

A histogramming integrated circuit has been designed with 256 24-bit cells. The pipelined RAM-based architecture has been designed to give histogram capture rates of at least 8 MHz. The chip is... View More

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