IEEE - Institute of Electrical and Electronics Engineers, Inc. - Routing path reuse maximization for efficient NV-FPGA reconfiguration

2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC)

Author(s): Yuan Xue ; Patrick Cronin ; Chengmo Yang ; Jingtong Hu
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2016
Conference Location: Macau, China
Conference Date: 25 January 2016
Page(s): 360 - 365
ISBN (CD): 978-1-4673-9568-7
ISBN (Electronic): 978-1-4673-9569-4
ISSN (Electronic): 2153-697X
DOI: 10.1109/ASPDAC.2016.7428038
Regular:

Non-Volatile memory-based FPGAs (NV-FPGAs) are expected to replace traditional SRAM-based FPGAs to achieve higher scalability and lower power consumption. Yet the slow write performance of NVMs... View More

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