IEEE - Institute of Electrical and Electronics Engineers, Inc. - A novel low-cost dynamic logic reconfigurable structure strategy for low power optimization

2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC)

Author(s): Yu-Guang Chen ; Wan-Yu Wen ; Yun-Ting Wang ; You-Luen Lee ; Shih-Chieh Chang
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2016
Conference Location: Macau, China
Conference Date: 25 January 2016
Page(s): 250 - 255
ISBN (CD): 978-1-4673-9568-7
ISBN (Electronic): 978-1-4673-9569-4
ISSN (Electronic): 2153-697X
DOI: 10.1109/ASPDAC.2016.7428019
Regular:

Low power design techniques have been extensively applied in modern IC designs to avoid negative side effects from high power density. Unlike Dynamic Voltage and/or Frequency Scaling (DVFS)... View More

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