IEEE - Institute of Electrical and Electronics Engineers, Inc. - 10.5 A digital PLL with feedforward multi-tone spur cancelation loop achieving

2016 IEEE International Solid-State Circuits Conference (ISSCC)

Author(s): Cheng-Ru Ho ; Mike Shuo-Wei Chen
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2016
Conference Location: San Francisco, CA, USA
Conference Date: 31 January 2016
Page(s): 190 - 191
ISBN (Electronic): 978-1-4673-9467-3
ISBN (Paper): 978-1-4673-9466-6
ISSN (Electronic): 2376-8606
DOI: 10.1109/ISSCC.2016.7417971
Regular:

A low-spur PLL is desirable for many applications since it avoides mixing unwanted blocker signals, prevents emission mask violations or minimizes jitter in the clock source. Internal spurs result... View More

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