IEEE - Institute of Electrical and Electronics Engineers, Inc. - 10.1 A pin-efficient 20.83Gb/s/wire 0.94pJ/bit forwarded clock CNRZ-5-coded SerDes up to 12mm for MCM packages in 28nm CMOS

2016 IEEE International Solid-State Circuits Conference (ISSCC)

Author(s): Amin Shokrollahi ; Dario Carnelli ; John Fox ; Klaas Hofstra ; Brian Holden ; Ali Hormati ; Peter Hunt ; Margaret Johnston ; John Keay ; Sergio Pesenti ; Richard Simpson ; David Stauffer ; Andrew Stewart ; Giuseppe Surace ; Armin Tajalli ; Omid Talebi Amiri ; Anton Tschank ; Roger Ulrich ; Christoph Walter ; Fabio Licciardello ; Yohann Mogentale ; Anant Singh
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2016
Conference Location: San Francisco, CA, USA
Conference Date: 31 January 2016
Page(s): 182 - 183
ISBN (Electronic): 978-1-4673-9467-3
ISBN (Paper): 978-1-4673-9466-6
ISSN (Electronic): 2376-8606
DOI: 10.1109/ISSCC.2016.7417967
Regular:

High-speed signaling over package substrates is key to delivering the promise of 2.5D integration. Applications abound and include high-density memory interfaces, sub-division of large dies to... View More

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