IEEE - Institute of Electrical and Electronics Engineers, Inc. - Nanoscale TiN wet etching and its application for FinFET fabrication

2009 International Semiconductor Device Research Symposium (ISDRS)

Author(s): Liu, Y.X. ; Kamei, T. ; Endo, K. ; O'uchi, S. ; Tsukada, J. ; Yamauchi, H. ; Hayashida, T. ; Ishikawa, Y. ; Matsukawa, T. ; Sakamoto, K. ; Ogura, A. ; Masahara, M.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 December 2009
Conference Location: College Park, MD, USA, USA
Conference Date: 9 December 2009
Page(s): 1 - 2
ISBN (CD): 978-1-4244-6031-1
ISBN (Paper): 978-1-4244-6030-4
DOI: 10.1109/ISDRS.2009.5378248
Regular:

It is well known that the PVD TiN is a promising gate material to set symmetrical threshold voltage (Vth) for nondoped channel FinFET CMOS thanks to its midgap work function [1-4]. One of the most... View More

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