IEEE - Institute of Electrical and Electronics Engineers, Inc. - Modeling of perimeter-gated silicon avalanche diodes fabricated in a standard single-well CMOS process

2009 International Semiconductor Device Research Symposium (ISDRS)

Author(s): Akturk, A. ; Dandin, M. ; Goldsman, N. ; Abshire, P.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 December 2009
Conference Location: College Park, MD, USA, USA
Conference Date: 9 December 2009
Page(s): 1 - 2
ISBN (CD): 978-1-4244-6031-1
ISBN (Paper): 978-1-4244-6030-4
DOI: 10.1109/ISDRS.2009.5378222
Regular:

We investigate design, fabrication and numerical modeling details of a silicon impact ionization device that was implemented in a standard CMOS process line for use in biomedical applications. To... View More

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