IEEE - Institute of Electrical and Electronics Engineers, Inc. - Performance analysis of nonvolatile gate-all-around charge-trapping TAHOS memory cells

2009 International Semiconductor Device Research Symposium (ISDRS)

Author(s): Gnani, E. ; Gnudi, A. ; Reggiani, S. ; Baccarani, G. ; Fu, J. ; Singh, N. ; Lo, G.Q. ; Kwong, D.L.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 December 2009
Conference Location: College Park, MD, USA, USA
Conference Date: 9 December 2009
Page(s): 1 - 2
ISBN (CD): 978-1-4244-6031-1
ISBN (Paper): 978-1-4244-6030-4
DOI: 10.1109/ISDRS.2009.5378209
Regular:

In this work we present an investigation on the program, erase and retention properties of TaN/Al2O3/HfO2/SiO2/Si (TAHOS) nonvolatile (NV) memory cells fabricated on an advanced... View More

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