IEEE - Institute of Electrical and Electronics Engineers, Inc. - Fabrication approach for lateral InGaAs tunnel transistors

2009 International Semiconductor Device Research Symposium (ISDRS 2009)

Author(s): D. Wheeler ; S. Kabeer ; Yeqing Lu ; T. Vasen ; Qin Zhang ; Guangle Zhou ; K. Clark ; Haijun Zhu ; Yung-Chung Kao ; P. Fay ; T. Kosel ; Huili Xing ; A. Seabaugh
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 December 2009
Conference Location: College Park, MD, USA
Conference Date: 9 December 2009
Page(s): 1 - 2
ISBN (CD): 978-1-4244-6031-1
ISBN (Paper): 978-1-4244-6030-4
DOI: 10.1109/ISDRS.2009.5378160
Regular:

In this work, the lateral InGaAs tunnel FET is configured and sized to enable gate control of the Zener (reverse bias) tunneling current. The p+InGaAs transistor channel is 4 nm thick with a n+p+... View More

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