IEEE - Institute of Electrical and Electronics Engineers, Inc. - Investigation of strain relaxation in patterned strained silicon-on-insulator structures by Raman spectroscopy and computer simulation

2009 International Semiconductor Device Research Symposium (ISDRS)

Author(s): Gu, D. ; Naumann, F. ; Petzold, M. ; Zhu, M. ; Baumgart, H.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 December 2009
Conference Location: College Park, MD, USA, USA
Conference Date: 9 December 2009
Page(s): 1 - 2
ISBN (CD): 978-1-4244-6031-1
ISBN (Paper): 978-1-4244-6030-4
DOI: 10.1109/ISDRS.2009.5378087
Regular:

It is well established that the strain in sSOI wafers can be maintained during the high temperature processing steps required by CMOS technology if suitable precautions are taken during patterning... View More

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