IEEE - Institute of Electrical and Electronics Engineers, Inc. - Investigation of the device design challenges and optimization issues associated with complementary SiGe HBT scaling

2009 International Semiconductor Device Research Symposium (ISDRS)

Author(s): Chakraborty, P.S. ; Moen, K. ; Bellini, M. ; Cressler, J.D.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 December 2009
Conference Location: College Park, MD, USA, USA
Conference Date: 9 December 2009
Page(s): 1 - 2
ISBN (CD): 978-1-4244-6031-1
ISBN (Paper): 978-1-4244-6030-4
DOI: 10.1109/ISDRS.2009.5378034
Regular:

Complementary bipolar technology (npn + pnp BJTs) has long been considered the "gold-standard" for analog applications requiring high speed, low noise, high bandwidth, large voltage swing, and... View More

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