IEEE - Institute of Electrical and Electronics Engineers, Inc. - Optimizing Parametric BIST Using Bio-inspired Computing Algorithms

2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT)

Author(s): Nemati, N. ; Simjour, A. ; Ghofrani, A. ; Navabi, Z.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2009
Conference Location: Chicago, Illinois, USA, USA
Conference Date: 7 October 2009
Page(s): 268 - 276
ISBN (Paper): 978-0-7695-3839-6
ISSN (Paper): 1550-5774
DOI: 10.1109/DFT.2009.55
Regular:

Optimizing the BIST configuration based on the characteristics of the design under test is a complicated and challenging work for test engineers. Since this problem has multiple optimization... View More

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