IEEE - Institute of Electrical and Electronics Engineers, Inc. - Fault-Tolerant Routing Algorithm for Network on Chip without Virtual Channels

2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT)

Author(s): Fukushima, Y. ; Fukushi, M. ; Horiguchi, S.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2009
Conference Location: Chicago, Illinois, USA, USA
Conference Date: 7 October 2009
Page(s): 313 - 321
ISBN (Paper): 978-0-7695-3839-6
ISSN (Paper): 1550-5774
DOI: 10.1109/DFT.2009.41
Regular:

Constructing 2D mesh topology network on chips (NoCs) without using virtual channels becomes attractive approach to building future massive multi-core computer systems because of its large amount... View More

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