IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 6bit, 7mW, 250fJ, 700MS/s subranging ADC

2009 IEEE Asian Solid-State Circuits Conference (A-SSCC)

Author(s): Asada, Y. ; Yoshihara, K. ; Urano, T. ; Miyahara, M. ; Matsuzawa, A.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2009
Conference Location: Taipei, Taiwan, Taiwan
Conference Date: 16 November 2009
Page(s): 141 - 144
ISBN (CD): 978-1-4244-4434-2
ISBN (Paper): 978-1-4244-4433-5
DOI: 10.1109/ASSCC.2009.5357198
Regular:

A 6 bit, 7 mW, 700 MS /s subranging ADC fabricated in 90 nm CMOS technology with SNDR of 34 dB for Nyquist input frequency is presented. The subranging architecture using CDACs, gate-weighted... View More

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