IEEE - Institute of Electrical and Electronics Engineers, Inc. - Impact of thermal through silicon via (TTSV) on the temperature profile of multi-layer 3-D device stack

2009 IEEE International Conference on 3D System Integration (3DIC)

Author(s): Singh, S.G. ; Chuan Seng Tan
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2009
Conference Location: San Francisco, CA, USA, USA
Conference Date: 28 September 2009
Page(s): 1 - 4
ISBN (CD): 978-1-4244-4512-7
ISBN (Paper): 978-1-4244-4511-0
DOI: 10.1109/3DIC.2009.5306527
Regular:

IC performance is now predominantly governed by interconnects delay due to smaller wire cross-section, wire pitch and longer lines that traverse across larger chips. These increase the resistance... View More

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