IEEE - Institute of Electrical and Electronics Engineers, Inc. - SoC-level risk assessment using FMEA approach in system design with SystemC

2009 IEEE International Symposium on Industrial Embedded Systems (SIES)

Author(s): Yung-Yuan Chen ; Chung-Hsien Hsu ; Kuen-Long Leu
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 July 2009
Conference Location: Lausanne, Switzerland, Switzerland
Conference Date: 8 July 2009
Page(s): 82 - 89
ISBN (CD): 978-1-4244-4110-5
ISBN (Paper): 978-1-4244-4109-9
DOI: 10.1109/SIES.2009.5196199
Regular:

As system-on-chip (SoC) becomes prevalent in the intelligent system applications, the reliability issue of SoC is getting more attention in the design industry due to the rapid increasing rate of... View More

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