IEEE - Institute of Electrical and Electronics Engineers, Inc. - Stacked 3-dimensional 6T SRAM cell with independent double gate transistors

2009 IEEE International Conference on IC Design and Technology (ICICDT)

Author(s): Weis, M. ; Pfitzner, A. ; Kasprowicz, D. ; Emling, R. ; Fischer, T. ; Henzler, S. ; Maly, W. ; Schmitt-Landsiedel, D.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 May 2009
Conference Location: Austin, TX, USA, USA
Conference Date: 18 May 2009
Page(s): 169 - 172
ISBN (Paper): 978-1-4244-2933-2
ISBN (Online): 978-1-4244-2934-9
DOI: 10.1109/ICICDT.2009.5166288
Regular:

A stacked three-dimensional six transistor SRAM cell using a novel vertical slit field effect transistor with two independently controlled gates is proposed. A compact stacked 3D memory cell... View More

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