IEEE - Institute of Electrical and Electronics Engineers, Inc. - High-Performance Buffer Mapping to Exploit DRAM Concurrency in Multiprocessor DSP Systems

2009 IEEE/IFIP International Symposium on Rapid System Prototyping (RSP)

Author(s): Dongwon Lee ; Bhattacharyya, S.S. ; Wolf, W.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2009
Conference Location: Paris, France, France
Conference Date: 23 June 2009
Page(s): 137 - 144
ISBN (Paper): 978-0-7695-3690-3
ISSN (Paper): 1074-6005
DOI: 10.1109/RSP.2009.34
Regular:

Design methodologies and tools based on the synchronous dataflow (SDF) model of computation have proven useful for rapid prototyping and implementation of digital signal processing (DSP)... View More

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