IEEE - Institute of Electrical and Electronics Engineers, Inc. - Poly-width-modification method for canceling layout-dependent characteristic variations for low-standby-power CMOS technologies

2009 IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2009)

Author(s): S. Nakai ; K. Fujita ; T. Minami ; J. Mitani ; T. Sawano ; T. Chijimatsu ; T. Deguchi ; S. Asai ; M. Suga
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 May 2009
Conference Location: Berlin, Germany
Conference Date: 10 May 2009
Page(s): 62 - 65
ISBN (CD): 978-1-4244-3615-6
ISBN (Paper): 978-1-4244-3614-9
ISSN (Electronic): 2376-6697
ISSN (Paper): 1078-8743
DOI: 10.1109/ASMC.2009.5155954
Regular:

Due to increase of integration density on a chip, layout variations have a serious impact on MOSFET behavior, such as active-area-size dependence (the STI-stress effect), well-boundary location... View More

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