IEEE - Institute of Electrical and Electronics Engineers, Inc. - A low-power, small-area 1 MSample/sec ADC for neural-signal recording systems in 0.35-µm CMOS

2009 4th International IEEE/EMBS Conference on Neural Engineering (NER)

Author(s): Zarifi, M.H. ; Frounchi, J.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 April 2009
Conference Location: Antalya, Turkey, Turkey
Conference Date: 29 April 2009
Page(s): 391 - 394
ISBN (CD): 978-1-4244-2073-5
ISBN (Paper): 978-1-4244-2072-8
DOI: 10.1109/NER.2009.5109315
Regular:

A fully differential, low-power, area-efficient analog to digital converter has been designed and simulated for implantable neural signal recording systems. Proposed ADC consisted of an analog... View More

Advertisement