IEEE - Institute of Electrical and Electronics Engineers, Inc. - On the estimation of assertion interestingness

2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)

Author(s): Tara Ghasempouri ; Graziano Pravadelli
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2015
Conference Location: Daejeon, South Korea
Conference Date: 5 October 2015
Page(s): 325 - 330
ISBN (Electronic): 978-1-4673-9140-5
ISBN (USB): 978-1-4673-9139-9
ISSN (Electronic): 2324-8440
DOI: 10.1109/VLSI-SoC.2015.7314438
Regular:

The definition of assertions is a fundamental phase for formal and semi-formal verification strategies as well as for documenting purposes. Assertions are generally manually defined, but several... View More

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