IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 280-ps Josephson 4-bitx4-bit parallel multiplier

Author(s): J. Sone ; J. Tsai ; H. Abe
Sponsor(s): IEEE Solid-State Circuits Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 1985
Volume: 20
Page(s): 1,056 - 1,060
ISSN (Paper): 0018-9200
ISSN (Online): 1558-173X
DOI: 10.1109/JSSC.1985.1052436
Regular:

The multiplier circuit is implement in 5-/spl mu/m Resistor Coupled Josephson Logic (RCJL) and uses dual-rail logic aiming for high-speed operation. The array configuration was adopted for its... View More

Advertisement