IEEE - Institute of Electrical and Electronics Engineers, Inc. - Edge Reduction for EVMDDs to Speed Up Analysis of Multi-state Systems

2015 IEEE International Symposium on Multiple-Valued Logic (ISMVL)

Author(s): Shinobu Nagayama ; Tsutomu Sasao ; Jon T. Butler ; Mitchell A. Thornton ; Theodore W. Manikas
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 May 2015
Conference Location: Waterloo, ON, Canada
Conference Date: 18 May 2015
Page(s): 170 - 175
ISBN (Electronic): 978-1-4799-1777-8
ISSN (Paper): 0195-623X
DOI: 10.1109/ISMVL.2015.22
Regular:

This paper introduces a reduction rule for edge-valued multi-valued decision diagrams (EVMDDs), which improves the speed of analysis of multi-state systems (MSSs). Most reduction rules for... View More

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