IEEE - Institute of Electrical and Electronics Engineers, Inc. - Modified SA algorithm for wirelength minimization in VLSI circuits

2015 International Conference on Circuits, Power and Computing Technologies (ICCPCT)

Author(s): Lalin L. Laudis ; S. Anand ; Amit Kumar Sinha
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 March 2015
Conference Location: Nagercoil, India
Conference Date: 19 March 2015
Page(s): 1 - 6
ISBN (Electronic): 978-1-4799-7075-9
ISBN (DVD): 978-1-4799-7074-2
DOI: 10.1109/ICCPCT.2015.7159500
Regular:

In modern VLSI circuits, number of parameters viz, placement of components, dead space (un occupied space in the layout), wire length has to be minimized. The defined problems are non... View More

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