IEEE - Institute of Electrical and Electronics Engineers, Inc. - Enhancement-mode GaN-on-Si MOS-FET using Au-free Si process and its operation in PFC system with high-efficiency

2015 IEEE 27th International Symposium on Power Semiconductor Devices & ICs (ISPSD)

Author(s): Hironobu Miyamoto ; Yasuhiro Okamoto ; Hiroshi Kawaguchi ; Yoshinao Miura ; Makoto Nakamura ; Tatsuo Nakayama ; Ichiro Masumoto ; Shinichi Miyake ; Tomohiro Hirai ; Machiko Fujita ; Takehiro Ueda ; Katsumi Yamanoguchi ; Atsushi Tsuboi
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 May 2015
Conference Location: Hong Kong, China
Conference Date: 10 May 2015
Page(s): 209 - 212
ISBN (Electronic): 978-1-4799-6261-7
ISBN (Paper): 978-1-4799-6259-4
ISSN (Paper): 1943-653X
DOI: 10.1109/ISPSD.2015.7123426
Regular:

We have developed an enhancement-mode GaN-on-Si MOS-FET with a thin GaN channel (40nm) on a thick AlGaN back barrier layer (1um), using Au-free 150-mm Si process. The developed device showed a... View More

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