IEEE - Institute of Electrical and Electronics Engineers, Inc. - Random pattern generation for post-silicon validation of DDR3 SDRAM

2015 IEEE 33rd VLSI Test Symposium (VTS)

Author(s): Hao-Yu Yang ; Shih-Hua Kuo ; Tzu-Hsuan Huang ; Chi-Hung Chen ; Chris Lin ; Mango C.-T Chao
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 April 2015
Conference Location: Napa, CA, USA
Conference Date: 27 April 2015
Page(s): 1 - 6
ISBN (Electronic): 978-1-4799-7597-6
DOI: 10.1109/VTS.2015.7116287
Regular:

Due to the demand of pursuing a main memory with larger data bandwidth, higher data density, and lower power, the specification of DRAM has been constantly evolved in the past decade. The new DRAM... View More

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