IEEE Computer Society - Modeling and Testing for Timing Faults in Synchronous Sequential Circuits

Author(s): Yashwant K. Malaiya ; Ramesh Narayanaswamy
Sponsor(s): IEEE Computer Society
Publisher: IEEE Computer Society
Publication Date: 1 November 1984
Volume: 1
Page(s): 62 - 74
ISSN (Paper): 0740-7475
DOI: 10.1109/MDT.1984.5005692
Regular:

Even with proper design, integrated circuits and systems can have timing problems because of physical faults or variation of parameters. The authors introduce a fault model that takes into account... View More

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