IEEE - Institute of Electrical and Electronics Engineers, Inc. - An Experimental Result on the Effect of Bypass Capacitance in Load Board for Semiconductor's Speed Testing

2008 10th Electronics Packaging Technology Conference (EPTC 2008)

Author(s): S.M. Low ; M. Phoon ; A. Suffian ; Johan
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 December 2008
Conference Location: Singapore, Singapore
Conference Date: 9 December 2008
Page(s): 1,196 - 1,201
ISBN (CD): 978-1-4244-2118-3
ISBN (Paper): 978-1-4244-2117-6
DOI: 10.1109/EPTC.2008.4763592
Regular:

Load board is a multi-layered printed circuit boars (PCB) commonly used as an interface device between the test equipment and the device under test (DUT) in semiconductor IC testing. Since the PCB... View More

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