IEEE - Institute of Electrical and Electronics Engineers, Inc. - Design and Optimization of Bump Structures of Large Die Fine Pitch Copper/Low-k FCBGA and Copper Post Interconnections

2008 10th Electronics Packaging Technology Conference (EPTC 2008)

Author(s): K. Biswas ; Shiguo Liu ; Xiaowu Zhang ; T.C. Chai
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 December 2008
Conference Location: Singapore, Singapore
Conference Date: 9 December 2008
Page(s): 429 - 434
ISBN (CD): 978-1-4244-2118-3
ISBN (Paper): 978-1-4244-2117-6
DOI: 10.1109/EPTC.2008.4763472
Regular:

This paper presents the study on the effect of bump structure, chip pad structures and die thickness of a large die Cu/low-k chip for improving assembly performance on organic buildup substrate.... View More

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