IEEE - Institute of Electrical and Electronics Engineers, Inc. - ZZ-HVS: Zig-zag horizontal and vertical sleep transistor sharing to reduce leakage power in on-chip SRAM peripheral circuits

2008 IEEE International Conference on Computer Design

Author(s): H. Homayoun ; M. Makhzan ; A. Veidenbaum
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2008
Conference Location: Lake Tahoe, CA, USA
Conference Date: 12 October 2008
Page(s): 699 - 706
ISBN (CD): 978-1-4244-2658-4
ISBN (Paper): 978-1-4244-2657-7
ISSN (Paper): 1063-6404
DOI: 10.1109/ICCD.2008.4751937
Regular:

Based on Recent studies peripheral circuit (including decoders, wordline drivers, input and output drivers) constitutes a large portion of the cache leakage. In addition as... View More

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