IEEE - Institute of Electrical and Electronics Engineers, Inc. - Removing hazards in multi-level logic optimization for generalized fundamental-mode asynchronous circuits

2008 IEEE International Conference on Computer Design

Author(s): Feng Shi
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2008
Conference Location: Lake Tahoe, CA, USA
Conference Date: 12 October 2008
Page(s): 640 - 645
ISBN (CD): 978-1-4244-2658-4
ISBN (Paper): 978-1-4244-2657-7
ISSN (Paper): 1063-6404
DOI: 10.1109/ICCD.2008.4751928
Regular:

Unlike traditional synthesis methods for fundamental-mode asynchronous circuits which require dedicated hazard-free algorithms, a multi-level logic optimization algorithm is developed to take... View More

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